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| As an electronic engineer, do you understand these eight misunderstandings? |
| 2019-03-07 |
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We often find that there are often errors in the rules or principles that we take for granted. Electronic engineers also have such examples in circuit design. The following are eight misunderstandings that an engineer has concluded.
Misunderstanding 1: PCB design requirements for this kind of sheet are not high, just use thin wire, automatic wiring
Remarks: Auto-wiring must occupy a large PCB area. At the same time, the automatic vias are much more than manual wiring and the aperture is much larger. PCB manufacturers of high-volume products believe that the price reduction factor is determined by the width of the trace and the number of holes, affecting the PCB. The output and the purchasing power of consumers have a lot to do with the cost of the supplier, and it is also a reason for the price cut.
Myth 2: These bus signals are pulled out with resistors. I feel relieved.
Comment: There are many reasons why the signal needs to be pulled up, but not all of the reasons must be pulled up. The pull-down resistor pulls a simple input signal and the current is tens of microamps or less. However, if a signal is driven, the current will reach milliamps. Current systems are typically 32-bit address data, which may have a 244/245 isolated bus and other signals that are pulled up, which consume several watts of power.
Misunderstanding 3: How to deal with unused I/O ports such as CPU and FPGA? Let it be empty before discussing it.
Note: If the unused I/O port is in a floating state, it may become a repetitive oscillation input signal due to slight external interference. The power consumption of the MOS device basically depends on the number of times the gate is flipped. If you pull it up, each pin will also have a microampere current, so the best way is to set it as an output (of course, you can't connect other external drive signals).
Misunderstanding 4: There are still many gates in this FPGA, you can play it out.
Remark: The power consumption of FGPA is proportional to the number of flip-flops used and the number of flips. Therefore, the power consumption of the same type of FPGA in different circuits may be different by 100 times. Reducing the number of high-speed flip-flops is the basic method to reduce FPGA power consumption.
Myth 5: The power consumption of these small chips is very low and does not need to be considered.
Note: The power consumption of the less complex chip inside is difficult to determine. It is primarily determined by the current on the pin. The ABT16244 consumes less than 1 mA without load, but its indicator is per foot. Can drive 60ma load (such as matching tens of ohms of resistance), that is, the maximum power consumption can reach 60 * 16 = 960mA, of course, only the power supply current is so large, the heat is on the load.
Misunderstanding 6: There are many control signals in the memory. I only need to use OE, we signal on this board. The choice of chip is grounded, so the data is much faster when I read the operation.
Comment: Most of the memory power consumption is more than 100 times. When the chip selection is valid (regardless of OE and us), CS should be used to control the chip as much as possible. If other conditions are met, the width of the chip selection pulse can be shortened.
Misunderstanding 7: How are these signals overshooted? As long as the game is successful, it can be eliminated.
Note: In addition to some specific signals (such as 100BASE-T, CML), there is overshoot. As long as they are not very big, they don't necessarily need to match, even if the match is not the best match. TTL output impedance is less than 50 ohms, and some even less than 20 ohms. If such a large matching resistor is used, the current is very large, the power consumption is unacceptable, and the signal amplitude is too small to be used. In addition, the output impedance of a typical signal at the output high level and the output low level is not the same, there is no way to achieve an exact match. Therefore, as long as the overshoot is acceptable, the matching of signals such as TTL, LVDS, and 422 is acceptable.
Misunderstanding 8: Reducing power consumption is a matter for hardware personnel, and has nothing to do with software.
Comments: Hardware is just a stage, software is software. Almost every chip access on the bus and the flipping of each signal are almost always controlled by software. If the software can reduce the number of external accesses (using more register variables, more use of internal cache, etc.), timely response to interrupts (interrupts are usually active low-band pull-up resistors) and other specific measures for specific boards Will greatly help reduce power consumption.
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